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back Pawel Garstecki photo
(born 1980) received M.Sc. degree from Poznan University of Technology in 2004. He is a Ph.D. student at the Chair of Multimedia Telecommunications and Microelectronics.

He is a co-author of some conference papers on hardware implementations of advanced video compression algorithms and image and video compression. The main areas of his professional activities are hardware design and efficient implementations of DSP algorithms (especially for video processing). His professional interests are centred on programmable logic devices (mainly FPGA). He is involved in development of hardware video AVC/H.264 codec. Besides, he is interested in artificial intelligence (inc. neural systems, genetic algorithms, pattern recognition and fuzzy logic) as well as in intelligent image and data processing and their applications. He is also a fan of fantasy and science-fiction literature and music.

Room: Polanka 138a Phone: 6653842 e-mail: pgarstec@et.put.poznan.pl webpage: pagar.multimedia.edu.pl
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